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FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs

EasyChair Preprint no. 11093

6 pagesDate: October 13, 2023


Data centers have been struggling to provide the necessary processing capacity to handle the surging rate of network traffic that is generated in an increasingly connected and service-oriented world. As a result, SmartNICs play an even more important role than before as they can offload various network applications and hence free CPU resources for application-layer processing, increase performance and reduce processing time. However, they often do not support flows with different offload requirements and cannot dynamically allocate offloads in runtime. In order to address these limitations, we propose FlexPipe, a fast, flexible and scalable packet-processing architecture for high-performance SmartNICs. Our design enables low-latency and runtime-reconfigurable packet forwarding at high traffic rates with minimal area overhead. Furthermore, it provides load-aware packet steering toward multiple offload units of the same type for low-bandwidth offloads. We implement a prototype of FlexPipe in Verilog and validate it via cycle-accurate register-transfer level simulations. Our evaluation results show that FlexPipe can process packets of arbitrary sizes with different offload requirements at line rate and on average 1.9x faster than a SmartNIC with a predefined sequence of offloads and 1.8x faster than PANIC, a flexible state-of-the-art SmartNIC.

Keyphrases: 6G, Load Balancing, packet processing, SDN, SmartNICs

BibTeX entry
BibTeX does not have the right entry for preprints. This is a hack for producing the correct reference:
  author = {Klajd Zyla and Marco Liess and Thomas Wild and Andreas Herkersdorf},
  title = {FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs},
  howpublished = {EasyChair Preprint no. 11093},

  year = {EasyChair, 2023}}
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