The challenge of balancing the flying capacitor (FC) voltage without sensing it remains a critical issue in multilevel FC converters. This digest proposes voltage balancing using digital current-mode control with emulating ramps and sampling inductor valley current twice per switching cycle. Thereafter, a current error correction logic has been incorporated for faster FC voltage balancing. The slope requirement of the emulating ramp has been determined analytically from the steady-state stability analysis. The proposed technique works satisfactorily, even during the start-up process. Along with simulation results, experimental case studies endorse the robustness of the proposed technique for a 48V to 12V, 200KHz laboratory hardware prototype.